Re: Preferred OS, processor family for running embedded Ada?

"Dr. Adrian Wrigley" <amtw@xxxxxxxxxxxxxxxxxxxxxxxxxxx> writes:

I came to Ada from VHDL. When I first encountered VHDL, my first though
was "Wow! You can say what you mean clearly". Features like user
defined types (ranges, enumerations, modular types, multi-dimensional
arrays) gave a feeling of clarity and integrity absent from software
development languages.

I had the same feeling when I first met Pascal, after learning APL and
Basic. Then Ada was just more of the same :).

But I have ever since wondered why the VHDL and Ada communities are
so far apart. It seems like such a natural partnership for
hardware/software codevelopment. And there is significant scope for
convergence of language features - fixing the niggling and
unnecessary differences too. Physical types, reverse ranges,
configurations, architectures, defered constants and ultra-light
concurrency come to mind from VHDL. And general generics, private
types, tagged types, controlled types from Ada (does the latest VHDL
have these?)

I haven't actually studied the additions in VHDL 2003, but I don't
think most of these Ada features make sense for VHDL. At least, if you
are using VHDL to program FPGAs.

And reverse ranges make things ambiguous, especially for slices of
unconstrainded arrays. So I don't want to see those in Ada.

One big problem with VHDL is that it was not actually designed for
programming FPGAs; it was designed as a hardware modeling language.
People discovered that you can sort of use it for FPGA programming,
and it was the only standard language available for that purpose.
There are many things that you can say in VHDL that make no sense in
an FPGA, so each compiler vendor picks a slightly different subset of
VHDL to support for FPGAs, and gives things different meanings.

Perhaps a common denominator language can be devised which has the
key features of both, with none of the obsolescent features, and
can be translated into either automatically?

Why would you want to translate them into each other? The semantics of
VHDL are _significantly_ different from Ada. A VHDL process is _not_
an Ada task.

Although I suppose if you decided to use VHDL to write code for a CPU
instead of an FPGA, you could decide that they were the same.

--
-- Stephe
.

Relevant Pages

  • Re: Preferred OS, processor family for running embedded Ada?
    ... I'm always surprised that VHDL engineers are not more open to Ada given ... Features like user ... C++ or Modula 3 as a first language in teaching. ...
    (comp.lang.ada)
  • Re: vhdl 200x status?
    ... No kidding about the marketing effort - this is a no brainer. ... convince VHDL users from your competitor that your tool is ... the same verification features that SV has. ... There is another key difference in the Accellera developement ...
    (comp.lang.vhdl)
  • Re: XML for LUT+FF netlist representation in (academic) tools
    ... I am currently working on a circuit generator problem, ... want to target to FPGAs. ... The reason is that this VHDL shares signals on a gate level. ... FPGA mapper has a hard time to figure out which gates need to be ...
    (comp.arch.fpga)
  • Re: News on VHDL-200X
    ... Do the testbench in SV and design in VHDL. ... features from both languages. ... types in the interfaces of blocks that you want to observe. ... So it is a question of legacy vs. new code, ...
    (comp.lang.vhdl)
  • Re: Questa AVM
    ... majority of the VHDL users only using a fraction of the ... cannot imply that other features might not be used either. ... ironically neither in SV core or std package), none in Verilog. ...
    (comp.lang.vhdl)