Re: RosAsm Team is Still Making Excuses
- From: Herbert Kleebauer <klee@xxxxxxxxx>
- Date: Tue, 10 May 2005 21:30:23 +0200
Beth wrote:
> Herbert Kleebauer wrote:
> > replace the "mov al,[b3] by the two instructions:
> >
> > inc [b0]
> > inc [b1]
> >
> > and compare the execution time with this two instructions:
> >
> > inc [b0]
> > inc [b4]
>
> But isn't this measuring something completely different?
It compares the time for a read/modify/write of two bytes,
once if the two bytes are in the same dword and once if
they are in different dwords.
> As b0, b1, b2 and b3 are all within the same DWORD access, while b4 is
> not...it is perhaps possible that the CPU temporarily "caches" the first
> four in a DWORD sized "temporary register" internally (e.g. it reads an
> entire DWORD into this "temporary register" and can thus simply refer to
> that directly for the other three bytes, before needing to "reload" that
> temporary register).
inc b0/b4 was faster than inc b0/b1, not the other way.
> You must really be measuring something _quite different_ here,
> Herbert...because, in fact, "b0" and "b4" are _BOTH_ DWORD aligned in this
> instance
I didn't read the whole thread, but I think the discussion was about
whether it makes any sense to store each of two byte variables at a
dword border (wasting three bytes) like b0/b4 or using two successive
bytes like b0/b1. And for the posted test program I got a much
higher speed for b0/b4 than for b0/b1
I thought, that there maybe is a pipeline conflict if a byte from
a dword is read when an other byte within the same dword
(modified by the previous inc instruction) has still to be
written. But because I couldn't find any time difference on
three other CPU's (even an old 486), maybe I have made some
mistakes. I have to wait till the weekend before I can test
it again on this PC.
.
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