Re: while ();
\\\o///annabee wrote:
>
> What you claim is irrelevant from a optimization perspective.
Dude, you might want to look up "superscalar" and "pairable
instructions".
Cheers,
Randy Hyde
.
Relevant Pages
- Re: Code density and performance?
... without harming performance or making superscalar ... |> embedded apps, 40% reduction in code size is well worth it, that's why ... Threaded code was fetched by external logic, looked up in the decode rom, and the corresponding native instructions fed to the processor. ... One saves much of the design effort of a ground-up design, and can hitch a ride on a commodity processor whose implementations follow Moore's law instead of being left behind by a small market niche as were Lisp machines. ...
(comp.arch) - Re: superscalar and superpipelined
... superscalar and superpipelined computers. ... so that perhaps over a dozen instructions are in various ... phases of execution at one time. ... A superscalar computer is one that has perhaps a second arithmetic ...
(comp.arch) - Re: [Error number: 0x800700B6] Cannot Update...Dont know why????
... instructions and I now see the new error message. ... Once again I am stuck and ... To avoid confusion I am currently seeing this ... Prev by Date: ...
(microsoft.public.windowsupdate) - Re: Code density and performance?
... without harming performance or making superscalar ... |> embedded apps, 40% reduction in code size is well worth it, that's why ... which implies the need for larger cache and more bandwidth on the memory cache channel. ... This is quite different from microcode that would decode instructions in software ...
(comp.arch) - Re: Code density and performance?
... without harming performance or making superscalar ... > a programmable microcode. ... microcode that would decode instructions in software (or "firmware", ... than a handful of available registers). ...
(comp.arch) |
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