Re: on reduce instruction lenght




Dragontamer wrote:
Chewy509 wrote:


Which I'm sure that most of you will be able to read and understand...

Yeah; it is somewhat understandable. But could I point out a few issues
that
IMO, are inconsistent.

!r2; //not r2

Hi DT,

Why? != is not equal, where the '!' denotes 'not'. I thought that would
be consistant.

That right there, is not the same as all your "mov" statements like
r1 = 0 for example. r2 is modified even though it is alone.

The not operation only has 1 operand (source and target must be the
same and there is no parameter for the operation). The general {reg} =
{reg} {operand} {reg|immed}; has this syntax because the target
register and source register may be different and there is a
parameter...

Negate (NEG) is also the same... -r0;

I think all unary instructions should be written out in full.

For example, you write out "pop" as:

pop r3

So "not" would easily map into:

not r2;

That way, you can save !r2 as a subexpression that doesn't
do anything alone. Like r3 + 1 doesn't do anything (except maybe
waste cycles), because you need the r3 = r3+1.

It keeps the code clear, to denote both the source and target, as it's
an already learned condition (basic algebra).

Basically; save the symbols for subexpressions with no side-effects.

Else you'll get code like:

-r2;

Neg r2;

And:

r3 = r3 - r2;

sub r3, r2;

(FYI: semi-colon is the instruction separator). If someone was to
write: r3 = r3 ; - r2;, the compiler would see that as 2 distinct and
separate functions, but doesn't that come back to the whole multi-line
source argument (that is raging in several other threads in this NG).

Which would do totally different things. Or worse:

r3 = r3 - -r2;

That would be considered invalid syntax, as you're doing 2 distinct
operations within the statement, (something which b0 doesn't allow).

Where any interpretation would be inconsistant with what you got.

-------------

Other little stuff:

What is your "comparison" for overflow?

if(%OVERFLOW){

};

while(%NOTOVERFLOW){

};

Shift right arithmatic? (SHR vs SAR) In Java, this is noted as >> vs
, so
your notation of >>> is inconsistant with (more popular) Java
programmers.

<<< and >>> map to rotate. (Never did really learn Java). :P

May I suggest o>> and o<< for rotate instructions though I wonder what
would be rcr vs ror... maybe c>> and c<< ?? Or maybe ><< and <>> ??

RCR, RCL are not mapped currently... The following also haven't been
mapped, Decimal math instructions, (DAS, DAA, AAA, AAS, etc), some bit
instructions (BTx, BSF, BSR, BSWAP), BOUND, ENTER, LEAVE, string
operations (CMPS, etc), flag control (STC, CLC, etc) and system
instructions (LMSW, RDMSR, etc).

Meh, I dunno how to make it better, but I don't like how it is right
now :)

I guess that's the point Randy was trying to make, it is very hard to
do this... While I've only mapped to around 80% of all basic
instructions (excluding SIMD), what has been mapped does tend to make
up 90%+ of all code out there...

--
Darran (aka Chewy509) brought to you by Google Groups!

.



Relevant Pages

  • Re: bitwise operators
    ... as each and every compiler is developed for ... a particular target micro-processor. ... responsibility to convert the bit-wise instructions into proper ... [If you're communicating with a non-C environment, it may matter, ...
    (comp.lang.c)
  • Re: [9fans] Format for relocatable objects
    ... that "they contain target-dependent code but not precise machine instructions", ... it certainly isn't machine independent. ... virtual instructions) available on that target (eg, ... the representation is therefore an abstraction of the real machine, ...
    (comp.os.plan9)
  • RE: Latest Principles of Operation
    ... Subject: Latest Principles of Operation ... of the compilers that these instructions can be used because the ... instructions because the target processor may not have the ... IBM developers can use z/Architecture instructions for _all_ new code ...
    (bit.listserv.ibm-main)
  • Re: Code transformation
    ... There are no equivalent 16bit instructions for all 32bit ... jge d2, d1, target ... and finally the jump is taken to "target" if ... Do you understand that the Infineon processor the OP is asking about ...
    (comp.programming)