Re: 16/32 processor operating mode


opexoc@xxxxxxxxx wrote:


I don't understand your way of thinking about it. Can you talk with me
using some easy dictionary ( ideas ) ? At first, I assume that we are
talking about x86 processor class.

Okay, x86 it is. You'd never specified that before and despite the
overwhelming discussion of x86 stuff around here, this newsgroup is not
dedicated to the x86 so one has to be careful with responses to
questions that aren't x86 specific.


So, I have processor x86 class and I want to decide whether it works in
16 bits mode or 32 bits mode.

What do you mean by "works in 16 bits mode or 32 bits mode?" From the
hardware perspective, as I already mentioned, most memory accesses are
64 bits. Indeed, the CPU generally reads or writes 64 bytes (or a
similar number of bytes, called a "cache line") in a single operation.
For example, if you move an 8-bit value into the AL register from
memory, and the contents of that memory location are not sitting in
cache somewhere, then the CPU must (generally) fetch an entire cache
line (e.g., 64 bytes) from memory before it can actually perform the
move operation. If you don't understand anything about how caching
works, I'd suggest reading a copy of my book "Write Great Code, Vol 1:
Understanding the Machine", a computer architecture book, or try
looking up "cache memory" on the internet. What you'll discover is that
an instruction like "mov(b,al);" does not necessarily access main
memory at all.


You told that it depends on some pin, OK
maybe.

No maybe about it. There are pins on the x86 processor that control how
much of the data bus is active when accessing stuff on the bus.
However, these pins generally are not asserted except for I/O devices.
For main memory, data transfers *usually* take place in cache-line
chunks.


But generally I want to realize how this 16/32 mode influence on
software ( OS mainly at first ) and what does it really means 16/32
mode and how it is connected with protected mode and real mode ( are
they synonyms ( 16 - real , 32 - protected ) ) ?

How the bus and cache operates is generally transparent to the
software. Again, I think you are confusing what people call "16 bit
mode" and "32 bit mode" on the x86 (which is chosen by a segment
selector) with data access on the bus. The two are unrelated concepts.

And I can't still
understand your vision of 16/32 segment types. Can you answer to these
simple question ( I think they are ) possible easiest as you can ?

Somewhere in memory there is a data structure called the "segment
selector table" (or something similar). A bit in this data structure
determines whether a segment is 16 bits or 32 bits. This, in turn,
determines how the CPU interprets certain opcodes that specify 16-bit
or 32-bit memory operands. All of this is independent of how much data
is transferred on the data bus in a single bus cycle. There is
insufficient space to *really* explain this concept here, check out the
Intel documentation for more details. But it's not going to be an easy
read; this is a *very* advanced concept and just getting to the point
where the Intel documentation makes any sense at all may take some
time. Again, a computer architecture book (hopefully one geared towards
the x86) might be a good place to start.
Cheers,
Randy Hyde

.

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