Re: To RISC or not to RISC



"KJH" <k_jh77@xxxxxxxxx> writes:
Hi!

Me thinks RISC based processor is boring to program in assembly.

I love them.

I
might be wrong, but I have the impression that more and more modern
CPU's are being designed as RISC. Relatively small set of instructions,
fixed-length instructions, really intended to program in HLL. Vast set
of registers to use

The only processor with a vast set of register that I know is a VLIW,
rather than a traditional RISC. 32 isn't vast. On a G5, with 4
instructions per tick, 32 is register starvation.

, with usually funny names like R0 - R20 etc...

ITYM 'sensible names'.

In contrast, x86 has few registers, and you can even halve those regs
into high and lo part and xchg those if it makes sense :) You got all
these special opcodes to do tiny little things, and you can really play
with the code... Focus on to details. That's what I like.

I don't get that 'assembly' feeling when I'm coding for example ARM.
It's not bad, but it doesn't give me the kick. Too little instructions
to choose :( I'm afraid that pure assembly coding is getting in the
future in position where it just isn't practical to do (if it is even
nowadays), but I don't want to code in C or it's nephews. Not much
anyway. I want to fiddle bits, and make ultratight loops, even if it
takes a little bit longer to code in low-level.

What do people here think about? How many will admit that they enjoy
pure ASM coding? It seems sometimes like it's almost criminal to enjoy
programming in assembly, but what can you do when you have seen the
light? ;)

Most of the really good coders I know are perfectly happy in asm.
I don't do it often, but when I do it, I enjoy it.

Phil
--
"Home taping is killing big business profits. We left this side blank
so you can help." -- Dead Kennedys, written upon the B-side of tapes of
/In God We Trust, Inc./.
.



Relevant Pages

  • Re: after SIMD implementation, is it still a RISC?
    ... as one of the defining properties of RISC, so I think the jury has ... instructions would see less usage. ... that register would have to serve as both ...
    (comp.arch)
  • To RISC or not to RISC
    ... Me thinks RISC based processor is boring to program in assembly. ... fixed-length instructions, really intended to program in HLL. ... I don't get that 'assembly' feeling when I'm coding for example ARM. ... pure ASM coding? ...
    (alt.lang.asm)
  • Re: Microcontroller ... which one ??
    ... > RISC is not a language. ... > instructions on the AVR are one cycle. ... Also, the PIC has a single working register, ... the PIC needs to load them into the W register (four cycles) ...
    (sci.electronics.design)
  • Re: IBM 45nm -- new or licensed from Intel?
    ... However this increases power consumption for all fetches, ... all instructions). ... I had the impression that 2-way for a RISC was 1 general integer FU ... x86compilers for lower-end, embedded systems?) ...
    (comp.arch)
  • Re: PIC vs ARM assembler (no flamewar please)
    ... The whole point of RISC is to be able to make a more efficient implementation - it is an architectural design philosophy aimed at making small and fast implementations. ... Thus the 68k is far from typical CISC, and is much more in the middle. ... The 68k can handle both operands of an ALU instruction in memory, ... Another example of the simplifications is that the CF no longer supports byte or word sizes for most operations - about the only instructions that support sizes other than the native 32 bits are MOVEs. ...
    (comp.arch.embedded)