Re: 3D ROM

hiya


On Mar 28, 12:01 am, "Evenbit" <nbaker2...@xxxxxxxxxxx> wrote:
On Mar 27, 6:25 pm, kaja_love...@xxxxxxxxx wrote:

I haven't had a chance to study it yet, but I gave your file a better
home:

http://www.4shared.com/dir/2332173/37355615/sharing.html

Nathan.

thanx mate


On Mar 28, 2:55 am, "Wolfgang Kern" <nowh...@xxxxxxxx> wrote:
<kaja_love...@xxxxxxxxx> wrote:
I hope I don't get flamed for what I'm about to ask :)

sorry, if you ask a question then I may answer as of immediate
whenever I know the answer.
but if you give us a riddle I may answer delayed
just when I get some spare time.
Patience I got, but free time is a rare.

So what was your three questions about ?

your'e welcome with any pending problem, but please don't waste
our precious/rare time by first ask for determining you quest.

Might be fun for those who have enough spare time, and
a few fellows in this group are already in retirement,
but most of us are still 'active'.

__
wolfgang

Not a single flame in it, just an advice of an oldie ... :)



I'm really sorry about that. It wasn't my intention to play mind games
and waste your time, but I really didn't know what else to do in terms
of trying to figure out the answers to these questions. So I asked the
questions best way I knew ( I know sometimes best isn't enough ).




On Mar 28, 8:07 am, Herbert Kleebauer <k...@xxxxxxxxx> wrote:
kaja_love...@xxxxxxxxx wrote:
, hoping that perhaps someone will find the time and patience to look
at the file and help me understand what is going on. If there is a
better way to post this file, please tell.

A static RAM has three types of connections:

- n address lines A(n-1).....A0
The binary number on this lines addresses one of 2^n memory locations

- m data lines D(m-1)....D0
Transfers data from and to a memory location. Some SRAMS have separate
data lines for input ( D(m-1)....D0 ) and output ( Q(m-1)...Q0 ).

- control lines
CS~: chip select: if 0, the SRAM is selected if 1, the SRAM in inactive (data
out is high impedance)
RW~: read/write: if 0 write access, if 1 read access
OE~: output enable: if 0, data out active, if 1 data out high impedance

In your example there seems to be no active low but active high control
signals for CS and RW, so the meaning of 0<->1 is reversed. It also
seems to be a SRAM with separate in- and output D/Q.


* No, Q definitelly means quit ( it said quit in original file, I just
abbreviated it )


* One of the questions was:

"At time T(16) = 10 the RAM's output value is ......."

At time T = 10, WE equals 1, which means that value ' D ' should be
written into memory location ' 0 '. But question asks what the output
value is. If data is written into memory, then there shouldn't be an
output value, so isn't the above question kinda wrong?!



I can't thank you enough for helping me out with this


.

Relevant Pages

  • Re: 3D ROM
    ... Transfers data from and to a memory location. ... CS~: chip select: if 0, the SRAM is selected if 1, the SRAM in inactive (data ... OE~: output enable: if 0, data out active, if 1 data out high impedance ... No, Q definitelly means quit (it said quit in original file, I just ...
    (alt.lang.asm)
  • Re: 3D ROM
    ... Transfers data from and to a memory location. ... CS~: chip select: if 0, the SRAM is selected if 1, the SRAM in inactive (data ... OE~: output enable: if 0, data out active, if 1 data out high impedance ... seems to be a SRAM with separate in- and output D/Q. ...
    (alt.lang.asm)