Re: signed unsiged add instruction
- From: "Gianmaria" <turbolence@xxxxxxxxx>
- Date: 29 Mar 2007 02:47:37 -0700
There is no difference in signed/unsigned addition if you
use 2's complement representation for signed numbers.
that's clear.
The difference of ADD and ADDU in the MIPS architecture is only,[...]
that the ADD instructions generates an overflow exception if
there is an overflow when the numbers are interpreted as
2's complement numbers whereas the ADDU instruction never
causes an overflow exception.
Suppose (just for simplicity) to work with 3 bit long word (000, 001
etc. range -4..3) and you want to add two signed number: 100 (-4) and
111 (-1). The result -5 is to big to be encoded in the 3 bit signed
word.
I was thinking that in case you use signed add instruction this will
preserve the sign bit (the leftmost bit) and give the result 111. On
the contrary if you use a unsigned add I was thinking the result would
be 011. So, if I understand correctly what I'm saying here is
perfectly incorrect :) Isn't it?
thank you, g.
.
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