Re: NASM 0.98.39 vs. NASM 2.03.01 disassembly

"Chuck Crayne" <ccrayne@xxxxxxxxxx> wrote in message
news:20080821183358.2b265275@xxxxxxxxxxxxxxxxxx
On Thu, 21 Aug 2008 02:50:31 -0400
"Rod Pemberton" <do_not_have@xxxxxxxxxxxxx> wrote:

But, to me, it seems that the
opcode map fails to make much sense for source register disassembly
for LAR and LSL by not fitting the cpu's register model.

True enough, but what you refer to as the "register model" doesn't
make much sense either. Even in the emulated IA-32 hardware model,

I'm not sure why you used "emulated" in this sentence...

there are no 8-bit or 16-bit registers.

True, if I remove "emulated"...

And in the x86_64 model,
there are no 32-bit registers.

OK. (BTW, it still seems to fit with the model I'm using... 8/16, 8/32, now
8/64... but, I'm not current on 64...)

When we refer to the "AH register",
for example, what we really mean is the low order 8 bits of the EAX
register. [Or in my case, the low order 8 bits of the RAX register.)

True, if I reject the (obvious) typo... If not a typo: False.

Nevertheless, the notation is useful, because it clearly indicates the
number of bits affected.

But, it's not just a matter of size, the encoding is important. In the bits
used to encode an instruction, a 16-bit instruction can encode only two
sizes of register: 8-bit and 16-bit. 32-bit instruction: 8-bit and 32-bit.
The mode and overrides determine if the non-8-bit register will be 16-bit or
32-bit. Not sure what holds for 64-bit.

Thus, it makes sense to me to disassemble a
register operand which Intel specifies as Ew as a 16-bit register.

But, it's not really a 16-bit only register due to the encoding. It's a
16-bit register for 16-bit mode and 32-bit register for 32-bit mode -
depending on the mode and overrides. The instruction descriptions confirm
that this is the case. And, the Intel (since at least 2003 or so) manuals
explicitly state that 32-bit mode reads 32-bit registers although they
discard the unused upper 16-bits. I.e., it's really acting like Ev, not
like Ew. From the manual descriptions, this is the case for the 386 also.

Is it any wonder then that none of us are particularly concerned about
conforming to a register model which is now a quarter-century old?

First, I suspect that 16-bit and 32-bit code for BIOS, video BIOS, PCI, will
be around for a long time...

Second, although Intel changed the instruction set for one of their cpu's,
AMD64 kept the instruction set mostly the same. I.e., the quarter-century
old register model is preserved because the instructions that operate on
those registers were preserved.


Rod Pemberton

.

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