Re: NASM 0.98.39 vs. NASM 2.03.01 disassembly

On Fri, 22 Aug 2008 04:10:42 -0400
"Rod Pemberton" <do_not_have@xxxxxxxxxxxxx> wrote:

I'm not sure why you used "emulated" in this sentence...

Perhaps this quote from Gabriel Torres' tutorial "Inside Pentium M
Architecture" <http://www.hardwaresecrets.com/article/270/4> will
explain it:

"Since the introduction of P6 architecture with Pentium Pro Intel
processors use a hybrid CISC/RISC architecture. The processor must
accept CISC instructions, also known as x86 instructions, since all
software available today is written using this kind of instructions. A
RISC-only CPU couldn’t be create for the PC because it wouldn’t run
software we have available today, like Windows and Office.

So, the solution used by all processors available on the market today
from both Intel and AMD is to use a CISC/RISC decoder. Internally the
CPU processes RISC-like instructions, but its front-end accepts only
CISC x86 instructions."

In other words, the cpu is a super-scalar RISC-like engine wrapped in a
layer of microcode which emulates the earlier x86 processors.

--
Chuck
http://www.pacificsites.com/~ccrayne/charles.html


.

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