Re: NASM 0.98.39 vs. NASM 2.03.01 disassembly

On Fri, 22 Aug 2008 22:16:55 -0400
"Rod Pemberton" <do_not_have@xxxxxxxxxxxxx> wrote:

(Since you said "RISC-like", I won't start in on you or Gabriel Torres
indicating that the later Pentiums core qualify as RISC...

In my view, true RISC has been dead for many years now. The original
RISC concept was that by supporting only a few basic instructions, it
would be possible to execute one instruction in each machine cycle. A
goal which, of course, has long since been surpassed.

Unfortunately, however, RISC became more of a marketing term than a
technical one, and I still know a number of otherwise highly respected
computer professionals who commonly use RISC as a synonym for Unix.

Emulation, to me, implies a
system which can't execute the code natively.

Historically, at least in the IBM world, emulation implied that the
translation was done, at least in part, by microcode, whereas
simulation implied that the translation was done entirely by software.
However, I recognize that, over the years, this distinction has been
lost. So, whatever you choose to call it is OK with me. The point
remains, however, that the P6 had 40 80-bit registers, and a register
renaming routine which allowed [e.g.] multiple EAX registers
containing different values to be in existence at any one time.

Since then, both the number and length of these re-nameable registers
have increased. So, when speaking about the physical CPU, there is
nothing at which one can point and truthfully say "This is an EAX
register." In fact, none of the traditional x86 registers is anything
but a transitory state of the ROB (Retirement Order Buffer)

--
Chuck
http://www.pacificsites.com/~ccrayne/charles.html


.

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