Re: NASM 0.98.39 vs. NASM 2.03.01 disassembly



Chuck Crayne <ccrayne@xxxxxxxxxx> wrote in part:
It is not the technology which I am disputing, but merely the
continued use of obsolete terminology. In the literal sense
of the acronym, ARM is definitely not RISC. Not only does
ARM have a large number of instructions, including multiple
multiply instructions, but it even has (Oh horror of horrors)
a divide instruction.

In the original RISC concept, such inherently time consuming
instruction were anathema.

Agreed. The temptations of microcode were too hard to resist!

-- Robert


.



Relevant Pages

  • Re: Learning ARM assembler...
    ... and it's quite clear that two of the aims behind the ARM processor was ... aim, because they were set up in such a way that they ... typically requiring more instructions to perform a task, ... market, it may need to acquire specialised or esoteric ...
    (comp.sys.acorn.programmer)
  • Re: Hi
    ... For history of older ARM architectures, the Wikipedia got a nice table ... ARM7 is based on arch v4, with ARM instructions only. ... ARM1136 come with a new architecture, which include new instructions, ... But Cortex-M3 doesn't not support ARM ...
    (comp.sys.arm)
  • Re: Hi
    ... The latest ARM ISA is ARMv7 ... For history of older ARM architectures, the Wikipedia got a nice table summarised the processor cores and their corresponding architecture. ... ARM7 is based on arch v4, with ARM instructions only. ... But Cortex-M3 doesn't not support ARM ...
    (comp.sys.arm)
  • Re: [patch 2/3] mutex subsystem: fastpath inlining
    ... >> Some architectures, notably ARM for instance, might benefit from ... So our starting point for comparison is 9 instructions for every down ... downand every upsimply going with mutexes. ... cycles since a function prologue and epilogue is somewhat costly on ARM, ...
    (Linux-Kernel)
  • Re: Learning ARM assembler...
    ... ARM is no longer elegant. ... I agree that some of the elegance is gone, ... It used to be that all instructions could be conditionally executed, ... using single instructions, preserving the PSR. ...
    (comp.sys.acorn.programmer)