Re: I/O Address Space
From: Robert Wessel (robertwessel2_at_yahoo.com)
Date: 05/07/04
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Date: Fri, 7 May 2004 01:37:06 +0000 (UTC)
"Cameron Gibbs" <odly@hotmail.com> wrote in message news:<4099eb1f$1@news.comindico.com.au>...
> Hey folks.
>
> I got the impression from what I was told in the Linear Address Space thread
> that the I/O port addresses were mapped by hardware.
> However after reading the Input/Output section again in the IA-32 Software
> Developer's Manuals, it says things like:
> "I/O port addresses 0F8H through 0FFH are reserved. Do not assign I/O ports
> to these addresses."
> AND
> "Like words in memory, 16-bit ports should be aligned to even addresses (0,
> 2, 4, ...) so that all 16 bits can be transferred in a single bus cycle."
>
> I think they are probably just mistakenly talking to hardware developers in
> a Software Developer's manual however it does raise the question:
>
> Are I/O addresses mapped (assigned) by hardware or can they be assigned any
> address by a programmer?
> If they can be assigned by a programmer, how?
They're mapped by hardware. The hardware, in some case, can be
reprogrammed to use specific addresses. For example, an I/O port BAR
on a PCI card can be set to a specific I/O port by the BIOS or OS.
What happens then is that the PCI interface chip on the card then
listens on the programmed port. In the case of PCI you can't really
misalign a block of ports since the assigned block must be a power of
two and at least four bytes in size.
The 0xf8-0xff ports are just reserved for Intel and various processors
have various things with those ports. For example, the 286 used
several of those ports to talk to the 287.
As to the alignment comment, it's hard to talk about the I/O
instructions without talking about hardware, and it's also something
of an admonition to not access an I/O port with anything other than
the "correct" size I/O instruction.
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