Re: IDE HDD control

From: wolfgang kern (nowhere_at_nevernet.at)
Date: 09/27/04

  • Next message: Robert Redelmeier: "Re: Help Wanted!! - Memmory management in hla!!"
    Date: Mon, 27 Sep 2004 11:09:59 +0000 (UTC)
    
    

    Hi Cameron,

    []
    | > | Primary IDE Controller, master drive:
    | > | Address: 1F0-1F7h
    | > | 8 Bytes
    | > Same ports for 'Primary slave drive'.

    | That basically answers my question.
    | Thanks!

    | > port 1f0 is four (two on older) bytes wide.
    |
    | I was thinking that some knowledgeable person would pick up on the 8
    | byte reference.
    | Speaking just about the older interface (negating newer improvements):
    | I was aware that the register at 1F0 was actually 16 bits making the
    | interface 9 bytes (I should perhaps say 8 registers).
    |
    | However I was not aware that one could have 32 bit registers mapped to
    | the 16 bit I/O address space.
    | Might the 16 bits for the I/O space refer only to the number of
    | possible I/O addresses?

    Right.
    Data-bus width: 32 bits
    Address-bus: 32(36/40) bits
    I/O-address limit: 16 bits
    I/O-space and MEMORY share data and address bus,
    but use separated bus-control-lines (I/O vs. MEM RD/WR cycles)

    | Otherwise maybe the HDD controller just handles the doubleword hit
    | using the 16 bit register. Squeezing it through one clock strike or
    | whatever?

    32-bit ports allow faster HD-RD/WR (even not really double).
    Most newer (~+1996) controllers have port[01F0] 32 bit wide,
    without writing to ports [01f1,2,3] (but work also with 16 bit),
    while the same chip may offer the ability to write
    16 or 32 bits to [01f4&5 or 01f3..01f6] as this ports
    are configured for byte access.

    | > Some controllers allow dword writes to 01f3 (LBA 0..27)
    | > bits 28..31 (high nibble of 01f6) are 'E' for master and 'F' for slave.

    | Any idea how to determine what HDDs would accept such a write and what
    | HDDs would not?

    It is merely the IDE-controllers ability, even ATA-2 mentioned a
    16/32-I/O bit in the identify device block (obsolete since long yet).

    So I check this by trying first to read 32-bits from 01f0
    (after any command which set the data-ready bit of course),
    if the resulting high-word is identical to the low-word
    then it is for sure that it supports only 16 bits.
    Write (after wait_ready) a dword to 01f3 and read it back
    as four single bytes, compare and you know.

    | While I am asking that, how would one go about determining the
    | presence or absence of a drive?

    1. reset drives (clear any previous error condition),
       here you can also decide to enable legacy IRQ(15/14) or not.
    2. enable timer interrupt (at least..)
       wait_ready or timeout (I still give it two seconds, just for oldies)
    3. send a identify-device command (this works also if in sleep-mode)
    4. wait_ready or timeout or error
    5. check 'data-request bit' (data ready for read here yet)
    6. if no_error,no_timeout then read the 512 bytes into a buffer.
       if error or timeout then there is either no drive or no controller
       or in some rare occasions a hardware or setup fault (like PCI-only).
    7. optionally repeat 1..5 with a 'indentify packet' command for CD-drives.

    ready: b7=0 b6=1 b0=0
    error: b7=0 b6=? b0=1
    data ready: b7=0 b6=1 b3=1 b0=0
    timeout: b7=1 time elapsed

    BUT: most controllers return b0=1 on all slave activity,
         so the error indication is the 'masters job' only.
    IIRC yet I used and 58h| cmp 58h |jnz error before all I/O-RD/WR.

    | No further confusion at this time.
    | Thanks wolfgang

    We sure find some more confusing things in this wild grown circuits :)
    Always welcome,

    __
    wolfgang


  • Next message: Robert Redelmeier: "Re: Help Wanted!! - Memmory management in hla!!"

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