Re: SSE2 half as fast as it should be?
- From: "Maarten Kronenburg" <spamtrap@xxxxxxxxxx>
- Date: Fri, 21 Apr 2006 16:59:52 +0200
Andrew,
There is a instruction latency document on
http://www.swox.com/~tege/
under Publications.
What instructions are you using?
Maarten.
<spamtrap@xxxxxxxxxx> wrote in message
news:1145585080.713363.224730@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
I haven't tried it yet, but from what I've read, Simple Integer SSE2
instructions in my 3.8 ghz Prescott CPU have latency 2 and throughput
2. But... the Prescott is supposed to have 2 simple ALU's that are
double pumped yielding 2x2x32 bits = 128 bits per clock cycle of simple
integer instructions. So... is the SSE2 manual wrong, or intel's
architecture (cuz they got the hardware to be twice as fast!)?
Anybody know of workarounds? I am matrix multiplying bits, which
depends on these simple alu instructions.
Thanks,
AndrewF
.
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