Re: [Clax86list] CISC vs RISC concepts -- from an assembly view
- From: "Charles A. Crayne" <spamtrap@xxxxxxxxxx>
- Date: Mon, 24 Apr 2006 21:36:24 -0700
On 24 Apr 2006 19:49:26 -0700
"HellsRaison" <spamtrap@xxxxxxxxxx> wrote:
:Am I thinking clearly and realistically?
Clearly, perhaps, but not realistically. :-)
The original goal of RISC was, indeed, to limit the instruction set to
operations which could be performed in a single clock cycle. However, that
target was not only met, but surpassed, many years ago. These days, even
CISC processors execute multiple instructions per clock cycle -- not to
mention such performance enhancements as "out of order execution", "branch
prediction algorithms", and many others.
I suggest that you read some of Intel's hardware overview manuals, which
you can download from their web site.
-- Chuck
.
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- From: HellsRaison
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