Re: CISC vs RISC concepts -- from an assembly view
- From: Tim Roberts <spamtrap@xxxxxxxxxx>
- Date: Tue, 25 Apr 2006 05:55:12 GMT
"HellsRaison" <spamtrap@xxxxxxxxxx> wrote:
So if this is true, shouldn't everyone be using RISC processors and
just use really smart compilers to create their executable. Because
that way the RISC can go extremely fast (1:1 ratio of CPU Cycles :
Operations -- or at least close to this), and all of the advanced math
stuff (that Intel uses -- SSE2, SSE3) would be embedded within the
executable output.
Am I thinking clearly and realistically?
Not quite. The theory is that a single CISC instruction can get more done
than a single RISC instruction. In a pure "1 cycle" RISC computer, the
instruction set cannot include instructions which require more than one
cycle. For example, many pure RISC processors do not even have a divide
instruction. The divide has to be simulated in software.
If RISC were unconditionally better than CISC, you would have seen the CISC
processors evaporate. That has not happened.
--
- Tim Roberts, timr@xxxxxxxxx
Providenza & Boekelheide, Inc.
.
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