Re: enabling x87 interrupts

Rod Pemberton <spamtrap@xxxxxxxxxx> wrote:

: "Alexei A. Frounze" <spamtrap@xxxxxxxxxx> wrote in message
: news:9tGdnYy8o5tcxnPZnZ2dnUVZ_sadnZ2d@xxxxxxxxxxxxxx
: > Wendy E. McCaughrin wrote:
: > > Is the 8259A (PIC) still used to enable interrupts? I unmasked bit #2
: > > in the master PIC and bit #5 (a.k.a. #13) in the slave PIC it cascades
: > > with, to enable FPU interrupts. I have unmasked all 6 exceptions in
: > > the FPU's control-word and use STI. Yet, INT 75h is never accessed.
: >
: > Nowadays, there's no external FPU chip that would assert interrupts on the
: > PIC. The CPU itself handles all the FP instructions. And my bet is that
: it's
: > configured in such a way that you should get exceptions, not interrupts.
: >

: What Alexei is refering to is the NE flag in CR0. If you didn't clear NE
: when switching to protected mode (recommended, set later if necessary), then
: you may not be getting Int 0x75. If the CR0 NE flag is 0, then an IRQ13
: (Int 0x75) is (or should be) generated, otherwise a CPU exception 10h (Int
: 0x10) is (or should be) generated.

Except that I am doing this in 16-bit Real Mode - not switching to Pmode.

.