Re: Branch prediction

"robertwessel2@xxxxxxxxx" <spamtrap@xxxxxxxxxx> wrote:

Try the Intel docs, including the optimization guides - there's a lot
of information there. In addition, there are bunches of white papers
online describing internals.
...
It's not really that the CPU is emulating any instructions, it's just
trying to execute more of them, and all sorts of things are done to
allow a nominally sequential stream of instructions to execute in
parallel. For example register renaming to eliminate sequential
dependencies, etc. For example, the CPU might detect that it can
issue the next three add instructions in a row all in parallel, since
they don't conflict. Obviously a conditional branch presents a
barrier to that sort of thing, unless you can predict which way the
branch is going to go. And since you can't (usually) predict that
with 100% certainty, the CPU has to be able to back out a bad guess.

Although, unless my memory has gone completely faulty, the more recent
processors actually use register renaming to execute BOTH paths of the
conditional, and simply discard half of the results when the result of the
jump is finally known.
--
Tim Roberts, timr@xxxxxxxxx
Providenza & Boekelheide, Inc.

.

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