Re: AP-67 82C37 Application Note
- From: HT-Lab <spamtrap@xxxxxxxxxx>
- Date: Sun, 25 May 2008 02:11:38 -0700 (PDT)
On May 24, 6:15 pm, "Wolfgang Kern" <spamt...@xxxxxxxxxx> wrote:
Hans "HT-Lab" asked:
Hi all,
Does anybody have, or know were I can find a copy of the AP-67
application note . I googled for a few hours but failed to find it.
This appsnote describes how to interface an 82C37 DMA controller to
an 8086.
IIRC I once saw it in the appendix of one of the Intel books (~1979).
This books will not be available anymore, but Intel may have 'AN-67'
(they called it "AN-.." rather than 'AP') in their archive.
Thanks, I will try to find the 1979 Intel databook (anybody has a
copy?).
I am particular interested in how to add a page register for
the memory-to-memory transfer option,
I'd add one (three for 32 bit) HC374 or similar to it.
What I am after is how to select the latches. During normal IO-2-
memory transfer I can use the DACK signals as latch enables, however,
for memory-2-memory DACK0/1 are not asserted. The only indication that
a memory-2-memory transfer is in progress is that AEN is asserted but
none of the DACK signals. I can use this to select 1 latch/page
register but I need one for both the source and destination.
I suspect that you can only transfer a blocks of memory within a
single 64KByte/128KWord page.
Thanks
Hans
www.ht-lab.com
__
wolfgang
.
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