Re: AP-67 82C37 Application Note

On May 25, 10:11 am, HT-Lab <spamt...@xxxxxxxxxx> wrote:
On May 24, 6:15 pm, "Wolfgang Kern" <spamt...@xxxxxxxxxx> wrote:
...

What I am after is how to select the latches. During normal IO-2-
memory transfer I can use the DACK signals as latch enables, however,
for memory-2-memory DACK0/1 are not asserted. The only indication that
a memory-2-memory transfer is in progress is that AEN is asserted but
none of the DACK signals. I can use this to select 1 latch/page
register but I need one for both the source and destination.

I suspect that you can only transfer a blocks of memory within a
single 64KByte/128KWord page.

Thanks
Hanswww.ht-lab.com

Hi All,

Thanks for the suggestions and comments. I have fixed the issue which
was actually quite simply. The only thing needed was a toggle flipflop
and an enable signal which is asserted when AEN is valid and all
DACK's are either high or low. The T-FF swaps the page register from
CH0 to CH1 after each ADSTB strobe. This setup should give enough
address setup and hold time.

Thanks,
Hans
www.ht-lab.com

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