Re: AP-67 82C37 Application Note
- From: "Wolfgang Kern" <spamtrap@xxxxxxxxxx>
- Date: Wed, 28 May 2008 10:10:50 +0200
Bob Masta wrote:
OTOH, CPUs are usually much faster than the RAM, so DMA-cycles may
not be any faster than REP:MOVS and the CPU cannot do very much
during it anyway, so the question is: why ?
As I recall, the original 8237 and 82C37 were limited to 5 MHz, which
was fine on the 4.88 MHz IBM PC. But then the AT came out with a
faster bus (first 6, then 8 MHz) and DMA had to be throttled back to
half-speed in order to stay under 5 MHz. Data acquisition cards that
had previously used DMA for I/O now found that string instructions
were faster.
Yes, my first AT (rare but still used for 5.25"->3.5") got a 4.15 MHz
RAM+bus, while the CPU runs at the 'high rate' of 10/12 MHz :)
But all I/O-peripherals, except VGA seem to be limited to 1 MHz.
Don't know how the speeds of the 8237 family might have increased over
the intervening decades.
Dunno either, I think they became part of chip-sets now and may have
got the same speed as the rest of the chip.
Many time passed since I designed hardware with discrete ICs,
FPGA and ASIC become faster on an almost daily base ...
__
wolfgang
.
- References:
- AP-67 82C37 Application Note
- From: HT-Lab
- Re: AP-67 82C37 Application Note
- From: Wolfgang Kern
- Re: AP-67 82C37 Application Note
- From: HT-Lab
- Re: AP-67 82C37 Application Note
- From: Wolfgang Kern
- Re: AP-67 82C37 Application Note
- From: Bob Masta
- AP-67 82C37 Application Note
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