Re: "Complete exercise" of x86 example?
- From: "Wolfgang Kern" <spamtrap@xxxxxxxxxx>
- Date: Sat, 2 Aug 2008 04:27:14 +0200
Jim Leonard wrote:
I am in need of a block of code that completely exercises the 8086 16-
bit instruction set (excluding 8086-specific and intel-specific quirks
such as POP CS and AAD/AAM with custom operand). While I can try to
go through the intel manual and code it up myself, I only consider
myself a novice at assembler and I'm afraid I would either miss
something, or screw up a lesser-known addressing mode, or some other
misstep.
I have a few BIOS listings that claim to test the CPU as part of POST,
but again I'm worried they aren't complete enough (or more accurately,
I would not be able to tell if they are complete enough).
Is there such a block of code in the wild somewhere that someone can
point me to?
you may find 8086 code in really old BIOS and very early DOS versions.
I once started with disassembling DOS3.1 and 286-BIOS and learned at
least the usage of common instructions.
A complete set of all possible instruction variants and addressing
modes will rare occure within one single code block, therefore I
made myself a testfile to check my own tools. It had no functional
sense, it was just a shortened binary list of valid opcodes.
16-bit code doesn't have too many addressing modes,
just four groups of eight, where the first group mean registers
and the other three memory operands [w/o, 8-bit, 16-bit displacements].
in the CPUs order:
r/m mod=11 mod=00 mod=01 mod=10
000 AL AX DS:[BX+SI] DS:[BX+SI+s8] DS:[BX+SI+d16]
001 CL CX DS:[BX+DI] ... ...
010 DL DX SS:[BP+SI]
011 BL BX SS:[BP+DI]
100 AH SP DS:[SI]
101 CH BP DS:[DI] ... ...
110 DH SI DS:[mem16] SS:[BP+s8] SS:[BP+d16]
111 BH DI DS:[BX] DS:[BX+S8] DS:[BX+d16]
(dots mean I'm lazy)
almost all general purpose instructions can use all of the above for
destination and/or source, but only one memory operand is possible.
So you got only 2(byte/word)*32*24 = 1536 basic variants in 16 bit code.
But then there are some possible segment override prefixes.
(086 ? ...286 had four segment-registers, 386 and above got six)
This means several thousand lines just for all ADD-instructions.
And the number may grow beyond imagination when prefix bytes 66/67
for 32-bit operand-size and/or 32-bit address-mode join in (+386).
More practical is to just remember the basic rules of the story and
forget about a complete (phone book sized) list of all variants.
__
wolfgang
.
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