Re: "Interesting" C behaviours

From: Christian Bau (christian.bau_at_cbau.freeserve.co.uk)
Date: 11/27/04 

Date: Sat, 27 Nov 2004 12:31:23 +0000

In article <lJVpd.356735$nl.170987@pd7tw3no>,
 Rennie deGraaf <ca.ucalgary.cpsc@degraaf> wrote:

> GCC, for instance, frequently doesn't even compile a%b to a single idiv
> instruction - it compiles it to a big mess of imul, shift, and leal
> instructions.

Because it is faster.

Relevant Pages

  • Re: Decreasing order of address within main
    ... flag is set, while an unsigned comparison would check the carry flag ... unsigned variants is a right shift. ... might be a single instruction. ...
    (comp.lang.c)
  • Re: Arithmetic shift right
    ... Command LSR (Logical Shift Right) shifts all the bits by one to the ... This instruction is called ... The most significant bit becomes the value of the Carry Flag. ...
    (alt.lang.asm)
  • Re: Shift in Parallel?
    ... right shift instruction that they can overhead with x86 CPU time. ... mov al,bit7 ... lea eax, ... SSE instruction using ADD, but not left shift. ...
    (comp.lang.asm.x86)
  • Re: Arithmetic shift right
    ... Command LSR (Logical Shift Right) shifts all the bits by one to the ... This instruction is called ... The most significant bit becomes the value of the Carry Flag. ... is nor arithmetic interpretation for this type of shift. ...
    (alt.lang.asm)
  • Re: Shift in Parallel?
    ... right shift instruction that they can overhead with x86 CPU time. ... mov al,bit7 ... lea eax, ...
    (comp.lang.asm.x86)