Re: hii


"Ganga" <ganga.jaiswal@xxxxxxxxx> wrote in message
news:1138695309.636515.193410@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
> Please, will anyone explain me difference between 'register' and
> 'volatile' variables

The difference depends upon their values.

register int r = 42;
volatile int v = 25;

printf("Difference between %d and %d is %d\n", r, v, r - v);

If you really mean to ask about the difference between
the 'register' and 'volatile' keywords, the answer can
be found in any good C book.

-Mike


.

Relevant Pages

  • Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures
    ... It doesn't mean that (volatile int*) cast is bad, ... I would agree that fixing the compiler in this case would be a good thing, ... bad register allocation. ... still quite possible to find cases where it did some optimization (in this ...
    (Linux-Kernel)
  • Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures
    ... gcc bugzilla bug #33102, for whatever that ends up being worth. ... x++ becomes a register load, ... volatile we can increment the memory directly. ... access memory mapped I/O registers where a RMW operation could be ...
    (Linux-Kernel)
  • Re: [patch] spinlocks: remove volatile
    ... I haven't been following this thread very closely but your assault on volatile is inappropriate. ... You cannot have an operand that describes a register class with a single member if that register is in the clobber list; there is simply no way to specify that an input operand is modified without explicitly specifying it as output. ... If all the output operands are for that purpose, ... volatile is _necessary_ for the asm to prevent the compiler from deleting it for this reason. ...
    (Linux-Kernel)
  • Re: When is "volatile" used instead of "lock" ?
    ... lock on the same reference you're ... volatile); but that's not its intention and it's certainly not documented as ... Also some may think that volatile implies a fence, which is not the case, it only tells the JIT to turn off some of the optimizations like register allocation and load/store reordering, but it doesn't prevent possible re-ordering and write buffering done by the CPU, note, that this is a non issue on X86 and X64 like CPU's, given the memory model enforced by the CLR, but it is an issue on IA64. ...
    (microsoft.public.dotnet.languages.csharp)
  • Is this code MT-Safe?
    ... void start ... Does _bRunning need to be tagged as volatile? ... m_pList to be cached in a register; what if the threads also called ... Do non-inlined function-calls change this behavior? ...
    (comp.lang.cpp)