Re: QC Reports on Compiler Enhancements

From: Danny Thorpe (nomail_at_borland.com)
Date: 03/13/04 

Date: Fri, 12 Mar 2004 18:18:55 -0800

"Eric Grange" <egrange@glscene.org> wrote in message
news:4051be9e@newsgroups.borland.com...
> > And therein lies the majority of the required compiler work:
implementing
> > register value tracking. I love it when people trivialize architectural
> > underpinnings.
>
> But it's there for integer/pointer values, I've *seen* it ^_^

Trust me, we don't have register value tracking. You're seeing artifacts of
other optimizations that occur higher up in the food chain.

> and I guess FPU stuff goes down a different path,

Very.

> Copy propagation is implemented that way, and f.i. when coding
>
> a:=0;
> b:=0;
>
> the compiler will generate xor/mov/xor/mov, but when coding
>
> a:=0;
> b:=a;
>
> you'll end up with xor/mov/mov, if a & b are local variables
> of integer or pointer type.

That's not register value tracking. It's not even an optimization. That's
called implementing what the source code says to do. ;>

If register value tracking were implemented, it would make the first case
generate code that looks like the second case.

> Other subexpressions and pointers leave their stuff in the
> registers too (quite commonly found in array access in for loops).
>

That's common subexpression elimination. Not register value tracking.

>
> > FDIV, FSQRT, and the trig functions are all still high latency
> > and would benefit from scheduling and interleaving with integer
> > ALU instructions.
>
> Not much in my experience, these are so slow that you can never seem
> to find enough ALU stuff to perform anything significant while they're
> running.

I can think of a lot of things I could do in the ALU while FDIV grinds away
for a minimum of 19 clocks, up to as many as 42 clocks.

> However, latency for FDIV is still lower than that of DIV
> or IDIV in most situations.

That's probably because DIV and IDIV are implemented as microcode that
forwards the operation to the FPU. If those instructions are marked as U/V
blocking (I don't have my pipeline chart handy), that's definitely the
reason.

-Danny

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