Re: how do PSoCs compare to AVRs and PICs?
From: Johnny (john_wr_at_NOSPAM.hotmail.com.)
Date: Fri, 26 Dec 2003 00:17:29 +1100
On 24 Dec 2003 15:16:41 -0800, U_JMood@umassd.edu (Mood) wrote:
I agree with your comments about the anachronisms of the PIC. That is
why I mention the AVR. I think the PIC is not so bad if you are
coding in assembly, but not as well suited to c compilers for the
reasons you mention. Since the latest AVRs have been released about 1
year ago with reduced die sizes, they are very competitive if you are
looking at performance per dollar compared to PIC.
>The PSoC instruction set nemonics actually look like 8051 to me, minus
>R0 indirect addressing and bit addressable RAM.
>Most of the instructions are in the 5-7 cycle range, with RMW types
>taking around 8 or 9, and the CPU runs up to 24 Mhz.
>The CPU isn't the best, but I have seen a diagram of the chip die, and
>the CPU takes up around %5 of the space, the I2C controller actually
>consumes more room! The majority of die space is dedicated to the
>configurable blocks, especially the analog hardware and muxes.
>I was never a fan of the mid-range pic, the banking and scratch-pad
>RAM were all screwed up AFAIK. Why i/o registers where plopped in the
>same linear address range as general purpose ram, I will never know.
>The cypress CPU is a bit slower, but coding is alot easier compared to
>email@example.com (Everett M. Greene) wrote in message news:<20031224.793CCD0.firstname.lastname@example.org>...
>> Johnny <john_wr@NOSPAM.hotmail.com.> writes:
>> > On Mon, 22 Dec 2003 23:02:13 GMT, Michael wrote:
>> > >Hi - PICs and AVRs enjoy a large amount of popularity among both
>> > >professionals and hobbyists - but PSoCs don't seem to be very popular among
>> > >either group. Is there any particular reason that AVRs and PICs are so much
>> > >more popular than PSoCs? How do they compare feature, price, and speed
>> > >wise? Thanks,
>> > PoSC's are much slower than the AVR. I recall that they use
>> > something like 10 or 12 clock cycles per instruction. Where as AVR
>> > can do one instruction per clock cycle by using pipelining for most
>> > instructions. Perhaps if speed is not important they might be useful.
>> I think you're exaggerating the clock cycles by about a factor
>> of 2, but, regardless, the Cypress processor's architecture
>> and instruction set is quite primitive compared to the AVR.