Re: writing bits to PORTA on p16f84

From: Guillaume (grs-NO-SPAM_at_NO-mail.com)
Date: 02/06/04 

Date: Fri, 06 Feb 2004 16:39:41 +0100

> From the diagram in the datasheet, if the bit is set as an input, the output
> from the latch would be 1.

The TRIS latch, yes. But it would put the ouput driver (the P/N pair)
in Hi-Z, exactly as is stated in the data sheet:

"Setting a TRISA bit (=1) will make the corresponding
PORTA pin an input, i.e., put the corresponding output
driver in a hi-impedance mode."

The upper transistor drawn in the diagram is a "P" type. It won't
act as a weak pull-up if the TRIS bit is 1, as you seem to mean.
Port B pins have weak pull-ups, see PORTB description to see the
difference.

> If nothing is driving the input pin high or low, I
> would think that is the value that would be read. What would be a reason for
> the value to be 0? Doesn't something need to pull the signal low to make it
> read 0?

No reason for it to be 1 either. See above. In input mode, the pin is
simply left "floating". A floating pin is a no-no in the "real world".
It could read anything, and possibly even oscillate in some cases,
with the side effect of consuming more current. That's why it's
important that you connect unused inputs either to ground or Vcc,
depending on the circuit.

In a simulator, they obviously have to choose a fixed state in this
case, since they probably won't simulate a real circuit with all its
complexity. That's why you have to use those simulators with a bit
of caution.

Relevant Pages

  • Re: Inverted Pins
    ... diagram it shows a high voltage for high. ... in the pin then it means its inverted with respect to the rest of the ... but I do not know if they already inverted it on the timing ... or if I'm support to invert it or if its really an internal thing and I ...
    (sci.electronics.basics)
  • Re: Inverted Pins
    ... diagram it shows a high voltage for high. ... in the pin then it means its inverted with respect to the rest of the ... But since MCLR does have the overbar it seems to imply that I should invert ... basically when I see an inverted pin and any timing diagrams I ...
    (sci.electronics.basics)
  • Re: Inverted Pins
    ... diagram it shows a high voltage for high. ... physical voltage into the pin on the device needs to be inverted? ... but I do not know if they already inverted it on the timing ... diagram or if I'm support to invert it or if its really an internal thing ...
    (sci.electronics.basics)
  • The Education of MassiveProng (Pt 3 of 275) (001/634) (034/634)
    ... circuit embodiment for implementation in FPGA 124 of FIG. 6; ... FIG. 56 is a pin diagram for a 208 pin PQFP package used for the MPU ... interface MCU and related to operational regions of the MCU, ...
    (sci.electronics.design)