Re: CPLD and FPGA designs

From: Gene S. Berkowitz (first.last_at_comcast.net)
Date: 03/06/04 

Date: Sat, 6 Mar 2004 02:49:52 -0500

In article <l4f2c.122531$Xp.542113@attbi_s54>,
devilingr@NOSPAMexcite.com says...
> Ok, I am about to get myself a dev kit from Xilinx or Lattice to start
> working in HDL language. The know the basics of HDL programming, and have
> the materials to learn the rest, now I just need to start experimenting with
> real parts.
>
> This question is about synthesis (and is a bit premature, I confess.) The
> only disadvantage I see to using FPGAs in a design is that some kind of ROM
> must be attached to configure the FPGA. After I have a final, working design
> and want a single chip solution, what is the next step? Do I send my code to
> a vendor that makes masked parts? Is there a OTP FPGA? Are there FPGAs with
> flash ROM built in?
>
> Sorry if these questions seem like newbie questions, but I have found tons
> of resources on HDL programming, but very little on actually going from
> software to hardware.
>
> Thanks for the help!
> Scott

Many FPGAs can auto-load from a serial EEPROM. Most can also be
serially programmed by a microcontroller.
There are EEPROM/Flash-based non-volatile FPGAs.
Yes, there are OTP parts.

--Gene

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