Re: CPLD and FPGA designs
From: Scott McDonnell (devilingr_at_NOSPAMexcite.com)
Date: 03/10/04
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Date: Wed, 10 Mar 2004 02:00:05 GMT
Thanks everyone for all the responses with information and real world
advice. I think I will probably work with CPLDs to begin with, just to get
myself familiar with the tools, synthesis, simulation, etc.. then I will
move on to FPGAs to implement in some of my real projects. I see Devry eSOC
boards on Ebay going fairly cheap that would give me a platform to start
making things happen. These are based on Altera Max Plus CPLDs and have dip
switches, 7 segment displays, JTAG interface, and protoboard pins.
Perhaps the best approach to that last bit would be to take a project I have
built with discrete logic and attempt to implement it in HDL. That way I
know exactly what to expect and what might be wrong if it doesn't work like
it should.
As far as languages - mostly, I am familiar with ABEL, but from the Verilog
and VHDL source I have seen, it shouldn't be too much of a leap to work in
those languages instead. I've been looking for a good reference book from
Amazon that will help ease the transistion.
Anyways, thanks again,
Scott McDonnell
"Scott McDonnell" <devilingr@NOSPAMexcite.com> wrote in message
news:l4f2c.122531$Xp.542113@attbi_s54...
> Ok, I am about to get myself a dev kit from Xilinx or Lattice to start
> working in HDL language. The know the basics of HDL programming, and have
> the materials to learn the rest, now I just need to start experimenting
with
> real parts.
>
> This question is about synthesis (and is a bit premature, I confess.) The
> only disadvantage I see to using FPGAs in a design is that some kind of
ROM
> must be attached to configure the FPGA. After I have a final, working
design
> and want a single chip solution, what is the next step? Do I send my code
to
> a vendor that makes masked parts? Is there a OTP FPGA? Are there FPGAs
with
> flash ROM built in?
>
> Sorry if these questions seem like newbie questions, but I have found tons
> of resources on HDL programming, but very little on actually going from
> software to hardware.
>
> Thanks for the help!
> Scott
>
>
- Next message: Lewin A.R.W. Edwards: "Re: 68000 cross asm/disasm"
- Previous message: dannynews: "chip/design used for GBIC?"
- In reply to: Scott McDonnell: "CPLD and FPGA designs"
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