Re: Any idea of minimum safe pixel clock for an 800x600 TFT LCD?

From: Paul Carpenter (paul$_at_pcserv.demon.co.uk)
Date: 04/06/04 

Date: Tue, 6 Apr 2004 15:35:45 +0000 (UTC)

On Tuesday, in article
     <l6wcc.23$xx1.267469@news.salzburg-online.at> yeti201@gmx.at
     "Wolfgang Mahringer" wrote:

>Hi Josh,
>
>Josh Lowe wrote:
>
>> "Don't fix NCLK to "H" or "L" level while the Vdd is supplied. If NCLK
>> is fixed to "H" or "L" level for certain period while ENAB is
>> supplied, the panel may be damaged".
>>
>> My concern is that if I use the M16C, and slow down the pixel clock to
>> 2 or 4 MHz to free it up somewhat, I risk causing the above damage.
>> Given the cost of the panel, I imagine my supervisor could be a mite
>> unhappy...
>
>Usually there is minimum refresh rate or pixel clock in the datasheet
>for your LCD.
>
>Fixing NCLK: if you stop shifting the bits, the display image isn't
>anymore refreshed, a usually black line shows up, because now you have
>applied a DC voltage to the LCD panel.
>These panel don't like DC voltages at all.
>You should avoid stopping the clock for more than a few milliseconds or so.
>
>I have made a project, where a small PIC processor scanned an LCD display.
>It scanned "full power" in the main loop to achieve satifactoy refresh
>rates. When an interrupt occured, I processed it (just a few ms) and
>then continued scanning.
>The effect was barely visible on the display.

Unfortunately for this type of display if that update was done once a minute
it would be fine, multiple times a second and it screws up the LCD timing.
These enable signal which is actually a combined H and V Sync and Blanking
signal are then decoded to give internal H and V drives, so even one pixel
difference on a line or frame causes jitter of the image. Do that sort of
interuption too often and you will notice it.
>
>HTH
>Wolf, visiting "down under" soon :-)
> 

-- 
Paul Carpenter		| paul@pcserv.demon.co.uk
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