Re: Using PLD or FPGA for ISA bus board with DMA
From: Assaf Sarfati (assaf_sarfati_at_yahoo.com)
Date: 04/25/04
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Date: 24 Apr 2004 21:59:34 -0700
<ISA> wrote in message news:<40895aaf$0$20662$afc38c87@news.optusnet.com.au>...
> I'm planning to build an ADC board with onboard buffer with DMA transfer
> from onboard buffer to computer's memory.
> Where can I find an ISA bus board design example with DMA functionality
> using PLD or FPGA ?
> What would be the max paractical speed to transfer data from ISA bus to PC's
> memory?
ISA was never designed for DMA, unless you consider the 8-bit 8237 on the
motherboard. Both ISA and the 8237 are very much obsolete, and even if
present on current chipsets, they have probably not been verified for
correct operation for generations (chip generations, that is).
Unless entirely impossible, I'd suggest designing a PCI board; there are
many interface chips available, and most of them include some sort of DMA.
Best of all, the PCI bus was designed to use DMA as its basic data-transfer
method (it's not called DMA; it's called Master transaction in PCI-speak).
Designing a board around a PCI interface chip not too bad; the chip makers
have lots of guides, app notes and possibly even evaluation cards available;
PCI is doable using 2 signal and 2 power planes - even (if you are very
careful) only 2 signal planes. OTOH, you can't wire-wrap or protoype one
very easily.
If going the PCI route, I'd recommend learning at least the PCI basics,
since it's very different from ISA, or any single-processor async bus
(which ISA basically is).
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