Re: Using PLD or FPGA for ISA bus board with DMA
From: Assaf Sarfati (assaf_sarfati_at_yahoo.com)
Date: 04/26/04
- Next message: E. Weddington: "Re: Where does C++ fit in?"
- Previous message: Gary Kato: "Re: Embedded Systems Novice."
- In reply to: KR Williams: "Re: Using PLD or FPGA for ISA bus board with DMA"
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Date: 25 Apr 2004 21:35:11 -0700
KR Williams <krw@att.biz> wrote in message news:<MPG.1af5a31ef66e903698978f@news1.news.adelphia.net>...
> In article <44b0ca4e.0404242059.3b82c9e8@posting.google.com>,
> assaf_sarfati@yahoo.com says...
> > <ISA> wrote in message news:<40895aaf$0$20662$afc38c87@news.optusnet.com.au>...
> > > I'm planning to build an ADC board with onboard buffer with DMA transfer
> > > from onboard buffer to computer's memory.
> > > Where can I find an ISA bus board design example with DMA functionality
> > > using PLD or FPGA ?
> > > What would be the max paractical speed to transfer data from ISA bus to PC's
> > > memory?
> >
> > ISA was never designed for DMA, unless you consider the 8-bit 8237 on the
> > motherboard. Both ISA and the 8237 are very much obsolete, and even if
> > present on current chipsets, they have probably not been verified for
> > correct operation for generations (chip generations, that is).
>
> THere are three forms of ISA DMA. The 8237 DMA registers only
> address one. ISA can also busmaster (HOLD/ HOLDA/, IIRC). IBM
> had a series of modem/sound cards that did ISA busmastering. It
> worked rather well, though the drivers had to copy into buffers
> below the 16MB line.
Actually, you had 2 x 8237 chips: one was wired for 8-bit, one for 16-bit
(even addresses) transfers. The two chips were cascaded (don't remember
which was master and which slave); one 8-bit channel was used for DRAM
refresh and one for floppy. Since the 8237 has only 16-bit address,
there was an external 8-bit register to get 24-bit address (up to 16 MB,
can't cross 64-KB physical address boundary in one DMA transaction).
You could also program a 8237 channel to be bus arbiter only, using your
own hardware to create bus cycles.
However, none of this was widely used, and even when there was no PCI,
many ISA DMA cards wouldn't work in all "PC Compatible" systems. IIRC,
most of these high-performance cards has a default programmed-I/O mode
(for example: basic ATA-controller PIO mode), which was the one used
by most users.
I am not at all sure that modern chipsets still support all these
modes. After all, who in his right mind will use an ISA bus-mastering
network or tape interface card TODAY? why waste verification CAD cycles
to test these modes? I am not even sure if modern OSes still read/write
floppy using DMA, and using DMA to refresh DRAM is dead as the Dodo.
>
> > Unless entirely impossible, I'd suggest designing a PCI board; there are
> > many interface chips available, and most of them include some sort of DMA.
> > Best of all, the PCI bus was designed to use DMA as its basic data-transfer
> > method (it's not called DMA; it's called Master transaction in PCI-speak).
>
> I wouldn't disagree with this assessment. ISA is dead, and may
> it stay dead. ;-)
>
> > Designing a board around a PCI interface chip not too bad; the chip makers
> > have lots of guides, app notes and possibly even evaluation cards available;
> > PCI is doable using 2 signal and 2 power planes - even (if you are very
> > careful) only 2 signal planes. OTOH, you can't wire-wrap or protoype one
> > very easily.
>
> You won't meet spec without the internal planes. It might work,
> but might not. I'd never go below 2S2P for a PCI card, which
> throws it out of the range of the hobbyist.
I was assuming a hobbyist card, so he wouldn't care about failure rate in
a 10,000-unit production run; one unit will most probably work - most PCs
leave a reasonable noise-margin error.
You may also be able to get a prototyping board with the PCI interface
ready for use and a prototyping area in the local-bus side.
> >
> > If going the PCI route, I'd recommend learning at least the PCI basics,
> > since it's very different from ISA, or any single-processor async bus
> > (which ISA basically is).
- Next message: E. Weddington: "Re: Where does C++ fit in?"
- Previous message: Gary Kato: "Re: Embedded Systems Novice."
- In reply to: KR Williams: "Re: Using PLD or FPGA for ISA bus board with DMA"
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Relevant Pages
|
