Re: DDR / DDR2 memory controllers

From: Andrew Dyer (andrew.spam.dyer_at_comcast.net)
Date: 06/25/04 

Date: Fri, 25 Jun 2004 03:54:21 GMT

On Thu, 24 Jun 2004 05:44:25 -0700, Richard wrote:

> Actually, I'm hoping to hear that someone's successfully added an
> external SDRAM controller to an MCU to use DDR SDRAM - to offload the
> refresh process and access timing.
>
> I've seen suggestions to use an FPGA for this, but I'm trying to avoid
> rolling my own solution.

SDRAM is relatively easy, and can be done in a moderate size CPLD
without much trouble. I've done a reasonably complete SDRAM
controller for an Analog devices DSP in a Xilinx 95108 a while
ago, and had room for some other interface glue logic left over.
If you stick with a x8 or x16 organization and tsop packaging you
should be able to get parts for a reasonable amount of time.

DDR is more problematic all the way around - the signalling levels,
clocking and particularly data recapture on reads are a bit ugly,
and really point more to an FPGA implementation.

Relevant Pages

  • Re: Dear Xilinx
    ... Do you know whether the clock rate is 200M or 133-167M for the starter kit? ... The file specifies a MT46V32M16xx-5B DDR SDRAM. ... am waiting to "receive security clearance on our server". ...
    (comp.arch.fpga)
  • Dear Xilinx
    ... I have been unable to get my Spartan 3E Starter Board to work ... The file specifies a MT46V32M16xx-5B DDR SDRAM. ... am waiting to "receive security clearance on our server". ...
    (comp.arch.fpga)
  • Re: Bios update
    ... the BIOS downloads for your motherboard. ... I am about to replace my SDRAM with DDR, ... of virtual memory adjustments from windows. ... A module of SDRAM is physically different from DDR SDRAM. ...
    (microsoft.public.windowsxp.hardware)
  • Which FPGA and memory to use? The eternal X vs. A question.
    ... The plan is to use a small and cheap FPGA with some memory. ... While searching for info on SDRAM interfacing I got an impression that the DDR SDRAM is very difficult to use and the board layout is very critical. ... There is also PSRAM as an option and a Digilent board with S3e and PSRAM, but it is more expensive than plain SDRAM by far. ...
    (comp.arch.fpga)