Re: CMOS design rules
From: Guy Macon (http://www.guymacon.com)
Date: 07/12/04
- Next message: Stefan: "Re: wireless serial Radio-Link"
- Previous message: Graeme: "USB2 HighSpeed"
- In reply to: Spehro Pefhany: "Re: CMOS design rules"
- Next in thread: Spehro Pefhany: "Re: CMOS design rules"
- Reply: Spehro Pefhany: "Re: CMOS design rules"
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Date: Mon, 12 Jul 2004 09:37:18 -0700
Spehro Pefhany <speffSNIP@interlogDOTyou.knowwhat> says...
>
>Jack Klein <jackklein@spamcop.net> wrote:
>
>>On the other hand, the standards for many manufacturing organizations
>>these days prohibit directly connecting power pins to either logic
>>supply. They require a resistor in the 1K to 10K range so that they
>>can drive it to the opposite level in automated test fixtures.
>
>That could find faults such as the output of an unused gate shorted to
>the supply rail, I suppose, but there must be few reasons for testing
>a logic state which never occurs in normal operation.
I disagree. I sometimes design systems where if the system fails
somebody (often a lot of somebodies) dies. If there is an unused
gate that doesn't work, I want to find it in test and replace that
chip; I don't trust it to not have other problems.
-- Guy Macon, Electronics Engineer & Project Manager for hire. Remember Doc Brown from the _Back to the Future_ movies? Do you have an "impossible" engineering project that only someone like Doc Brown can solve? My resume is at http://www.guymacon.com/
- Next message: Stefan: "Re: wireless serial Radio-Link"
- Previous message: Graeme: "USB2 HighSpeed"
- In reply to: Spehro Pefhany: "Re: CMOS design rules"
- Next in thread: Spehro Pefhany: "Re: CMOS design rules"
- Reply: Spehro Pefhany: "Re: CMOS design rules"
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Relevant Pages
|
