Re: why is freq Internally divided in uPs?

From: Everett M. Greene (mojaveg_at_mojaveg.iwvisp.com)
Date: 12/30/04 

Date: Thu, 30 Dec 2004 10:53:26 PST

Ben Bradley <ben_nospam_bradley@mindspring.com> writes:
>"funkymunky" <prehistorictoad2k@yahoo.com> wrote:
>
> >Ive studied the Intel 8085 and the 8051 as part of my curriculum. Im
> >curious to know why in both of these devices, the clock that is applied
> >to the device is internally divided by 2? why is half to clock value
> >not given instead?
>
> Having learned on a 6502, I often wondered that myself about other
> microprocessors. In the 6502, the oscillator frequency IS the internal
> clock (and it has the on-chip crystal oscillator circuit, just like
> most other such chips). It usually does a memory fetch or write on
> every clock cycle, so many instructions took only as many clock cycles
> as they needed memory accesses. The minimum was two, so one-byte
> instructions such as register-to-register transfers and no-op take two
> cycles.

That corresponds to a classical processor design: read the
instruction, memory access for one operand if necessary,
perform the operation, write the result to memory if
necessary. This gives from two to four "main" cycles to
execute an instruction. These "main" cycles don't
necessarily correspond to an oscillator frequency and
usually don't.

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