Re: I2C troubleshooting

From: Bob Stephens (stephensyomamadigital_at_earthlink.net)
Date: 03/08/05 

Date: Tue, 08 Mar 2005 19:06:02 GMT

On Tue, 08 Mar 2005 19:58:00 +0100, Patrick wrote:

> Hi,
>
> I'm developing an I2C slave device based on a MSP430F169.
> Another 'F169 is the master (for testing) and every now and then, the
> communication breaks down.
>
> The master's application is derived from TI app note slaa208
> "Interfacing an EEPROM to the MSP430 I2C Module".
>
> I'm implementing a I2C bootloader for the slave device, and the
> control flow goes like this:
>
> 1a) Master does "ack-polling" to see if the slave is there.
> (It puts a start-condition on the bus, followed by the slave address,
> followed by a stop condition, until it sees ACK from the slave)
> 1b) Slave I2C module HW sees its address byte and sends ACK
>
> 2a) Master reads slave's status register.
> 2b) Slave writes its status
> Master repeats until the register reads "OK, Slave ready"
>
> 3a) Master sends the control code for "write flash block"
> 3b) Slave enters "write flash block" routine
>
> 4a) Master sends a single line of the HEX file
> 4b) Slave writes data to flash and leaves "write flash block" routine
>
> 5a) Master jumps to 1) if it's not finished
>
> My problem is that the ack-polling sometimes doesn't work. It is not
> exactly reproducible, and it seems to depend on things like room
> temperature, air moisture, moon phase, etc.
> And this error doesn't happen if the master waits a LOOONG time
> (almost 100 ms) between steps 5) and 1). (But this is not desirable at
> all, and I want to know the real reason for this problem).
>
> When the ack-polling fails, the master sends the correct sequence on
> the bus, but the slave doesn't ACK, and this goes on forever.
> Ok, it must be the slave, I thought. But when I reset the _master_,
> then everything is OK again.
>
> Does this sound familiar to anyone? I don't really know how to further
> debug this stuff. I have normal pullups (5K ohms) and if there isn't
> lots of traffic, then everything's OK.
>
> Do I have to resort to s/w bit banging? The 'F169 errata *** doesn't
> mention any bugs in the I2C module, IIRC.
>
> Any ideas/suggestions are very welcome.
>
> TIA,
> Patrick

I2C has a mode where you can stretch the clock to accomodate slower
devices. IIRC the slave holds off the bus by stretching the low period of
SCL. There is a timeout feature to prevent hanging up the bus indefinitely.
Don't know if that's any help.

Bob

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