Re: ATmega SPI question

From: habib bouaziz-viallet (habib_at_mynewserverposfix.com)
Date: 03/15/05 

Date: Tue, 15 Mar 2005 09:09:18 +0100

Le Mon, 14 Mar 2005 20:21:22 +0100, Meindert Sprang a écrit :

> "habib bouaziz-viallet" <habib@mynewserverposfix.com> wrote in message
> news:pan.2005.03.14.18.45.45.766538@mynewserverposfix.com...
>> Configuring SPI bus in slave mode may require one more signal to drive SS.
>> AVR received and send at the same time DOUT and DIN to and from CoDeC.
>> Master SPI does not require SS driven, IHMO Master mode should be more
>> simple if fortunenately SCK would be a real clock input.
>
> But, by being master, the SPI interface knows exactly when a byte starts,
> because the transmission is started when a byte is written in the data
> register. In slave mode, you only know the beginning of a byte by detecting
> the assertion of SS. In short: what you want is impossible.
>
> Meindert

Hi Meindert,

Take a look at this :
http://cjoint.com/?dpjsxvXDQV
AVR is configured as a slave. SS is grounded, therefore AVR is not able to
update SPI shift reg for transmit after a byte is completely received
from CodeC. That's why i'm seeking about Master SPI mode with AVR.
Believe me i'm not a flasher !

Habib
betula.fr

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