Re: ATmega SPI question

From: habib bouaziz-viallet (habib_at_mynewserverposfix.com)
Date: 03/16/05

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    Date: Wed, 16 Mar 2005 09:11:33 +0100

    Le Tue, 15 Mar 2005 19:45:56 +0100, Volker Bosch a écrit :

    > habib bouaziz-viallet <habib@mynewserverposfix.com> wrote:
    >
    > [...]
    >> AVR is configured as a slave. SS is grounded, therefore AVR is not able to
    >> update SPI shift reg for transmit after a byte is completely received
    >> from CodeC. That's why i'm seeking about Master SPI mode with AVR.
    >
    > Hello Habib,
    >
    > I use the Mega16 as a slave on an SPI line. And there is no problem to
    > transmit more than 8 bit when /SS stays pemanently low. When the 8th
    > bit is transmitted, MCU will receive a SPI interrupt (if this interrupt
    > is enabled), no matter what logic state /SS has. The only problem is
    > that you have only about half a SPI-clock cycle of time for writing the
    > next transmit data byte into the transmitter register.
    >
    > Hope that helps.

    Hi Volker,

    I'm quite puzzled. SPI may be reloaded by AVR as Slave device regardless
    ~SS level ?

    here a code snippet i tried :

    #include <io.h>
    #include <interrupt.h>
    #include <signal.h>
    #include <pgmspace.h>

    #include "init.h"
    #include "types.h"
    #include "uart.h"
    #include "maya.h"
    #include "pcm.h"

    u08 pcm_in[256];
    u08 pcm_out[256];
    u08 spi_release = 0;

    /************************
     * SPI Interrupt handler
     ************************/
    SIGNAL (SIG_SPI)
    {
      static u08 i = 0;

      /* Read before Write SPDR !!! */
      pcm_out[i] = SPDR;
      SPDR = pcm_in[i++];
      
      if (i == 254)
        spi_release = 1;
      if (i == 255)
        i = 0;
    }

    AVR as a slave, SPDR never been updated in that code. In fact, the same
    byte received by the slave (MOSI) is transmitted the next shift process
    into MISO pin.

    Habib
    betula.fr

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