Re: 8051 to ARM - code size differences?
From: An Schwob in USA (schwobus_at_aol.com)
Date: 03/16/05
- Next message: Volker Bosch: "Re: ATmega SPI question"
- Previous message: Carsten: "Re: CPU temperature reading with C"
- In reply to: larwe_at_larwe.com: "8051 to ARM - code size differences?"
- Next in thread: larwe_at_larwe.com: "Re: 8051 to ARM - code size differences?"
- Reply: larwe_at_larwe.com: "Re: 8051 to ARM - code size differences?"
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Date: 16 Mar 2005 11:30:46 -0800
It depends!
the two extrems are bit handling and arithmetic. Lots of bit handling
will blow up the code size with an ARM by factor >> 2, lots of 16 or
even 32-bit arithmetic will shrink the code.
For example the size for Drystone benchmark shrinks going from 51 to
ARM (both in "C").
My experience is that designs done with a 51 use the strengths of that
architecture like bit handling, byte variables, special addressing
modes based on the Harward architecture. If so, the code size will most
certainly increase. The 40% you mentioned is actually at the lower end
of what I have seen, my typ number would be around 50%, but then again,
it depends. As soon as your data types are anything else then chars,
the ARM has a clear advantage even in code size because handling of
integers or longs takes a lot more code with 51.
Last but not least it depends on the original code size. If you convert
a program from a 51 that was 1 kB, most likely it will explode (>2x),
if you convert a program that was written in ASM and used 64 kB it
might grow very little (typ 10-20%). It is difficult to really
optimized 64k while it is very feasible with 1k. Most 51 applications
that I have seen are in the 8k code size range, that is where my 50%
come from.
Hope this helps, Schwob
l...@larwe.com wrote:
> A move from 8051 to ARM7 (with Thumb) is being contemplated. This
move
> would also incorporate a move from asm to C. Has anyone published
> metrics for code space increases in such a migration? I'm imagining a
> 40% size increase (wider instructions vs. optimize-friendly
> architecture) but this is basically a guess.
>
> I'd prefer a documented case study rather than simply anecdotes, but
> I'll take anecdotes if that's all I can get :)
>
> Performance is not a concern for this application; code size is.
- Next message: Volker Bosch: "Re: ATmega SPI question"
- Previous message: Carsten: "Re: CPU temperature reading with C"
- In reply to: larwe_at_larwe.com: "8051 to ARM - code size differences?"
- Next in thread: larwe_at_larwe.com: "Re: 8051 to ARM - code size differences?"
- Reply: larwe_at_larwe.com: "Re: 8051 to ARM - code size differences?"
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Relevant Pages
|