Re: 24-bit SPI?
- From: Mark Borgerson <mborgerson@xxxxxxxxxxx>
- Date: Thu, 28 Apr 2005 08:38:30 -0700
In article <d4qlu4$16j$1@xxxxxxxxxxxxxxxxxxx>, "Ryan" <rborntrager
<nospam>@ATgmail DOT.com> says...
>
> "David" <david.nospam@xxxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
> news:pan.2005.04.28.07.23.11.218000@xxxxxxxxxxxxxxxxxxxxxxxxxxxxx
> > On Thu, 28 Apr 2005 08:16:15 +0200, orc wrote:
> >
> > > "David" <david.nospam@xxxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message:
> > >> The usual method is to send three 8-bit transfers after each other,
> > >> holding the chip select low during the transfer. Some SPI controllers
> > >> (don't know about ARM chips) can do this automatically, but it's still
> > >> just a series of standard 8-bit transfers.
> > >
> > > Thanks. Most ARM controllers has both 8 and 16 bit SPI lenght because of
> > > efficiency (16 bit) (which is needed in my application) so that the
> > > controllers hasn't to put the three 8 bits together in a long var.
> manually
> > > (rotating and OR-ring). An alternativ question: is there somehow a
> better
> > > way to join the fractions into a 32 bit long (e.g. is the DMA controller
> > > able to transfer the data from the SPI and access the memory in 8 bit
> > > portions)?
> > >
> > > Any help is highly appreciated.
> >
> > I don't remember whether the ARM is big-endian or little-endian, but a
> > common way to merge bytes into a long is to use a union :
> > typedef union {
> > struct { unsigned char lolo, lohi, hilo, hihi; } bytes;
> > unsigned long longword;
> > } merger;
> >
> > Anyway, if your application can't afford the time taken to calculate
> > "(hilo << 16) | (lohi << 8) | lolo" after reading the data, then you
> > really need to think about what you are trying to do here, and whether you
> > are going about it the right way.
> >
> >
> >
>
> If you have an exceptionally large number of components communicating via
> SPI with abnormally high data rates, I could see where <<16 and <<8 could be
> a performance penalty. This is an embedded newsgroup; I would bet a good
> number of people here are examining their resulting assembly code and
> getting the most out of every cycle.
>
While I've done most of my ARM programming in C, I understand that the
ARM 7TDMI instruction set allows multiple-bit shifts to be combined
with arithmetic and logical operations in a single-cycle instruction.
Thus, there should be little or no overhead for the shift operation.
You would still have to use a few instructions to combine the data
elements, though. However, 3 bytes on a 20MHz SPI bus is still
more than a microsecond----time for quite a few instructions on
a 66MHZ ARM with fast memory.
Another thing to consider is that many SPI devices will transfer
zeros after they are finished with their 24 bits of valid data.
You could simply add another null transfer to your 3-byte
SPI transfer and have nicely aligned long words in memory.
My own worst case was an ADC that required 18 SPI clocks to
transfer 16 bits of valid data. Now THAT required a bit
of ingenuity!
Mark Borgerson
.
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- Re: 24-bit SPI?
- From: Ryan
- Re: 24-bit SPI?
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