8051 architecture question

I've been through a couple of 8051 tutorials but still have a very
fuzzy view of its architecture.

Could someone draw me a simple view of it.

>From what I gather there is Program Memory and Data Memory.

Withing Data Memory there are

1) General Purpose Registers (arranged in banks)
2) Bit Addressable Registers
3) Stack Space
4) SFR (Special Function Registers)


Now are Program Memory and Data Memory 2 separate memory spaces? If
not exactly where in Program memory does Data memory fit in? I read
something about both these memories being dual mapped...

Also where does the reserved memory area and scratchpad memory fit
into the picture.

Thanks.

.

Relevant Pages

  • Re: 8051 architecture question
    ... >>>From what I gather there is Program Memory and Data Memory. ... >>2) Bit Addressable Registers ... >>Now are Program Memory and Data Memory 2 separate memory spaces? ...
    (comp.arch.embedded)
  • Re: 8051 architecture question
    ... >>From what I gather there is Program Memory and Data Memory. ... >2) Bit Addressable Registers ... >Now are Program Memory and Data Memory 2 separate memory spaces? ...
    (comp.arch.embedded)
  • Re: 8051 architecture question
    ... > fuzzy view of its architecture. ... > From what I gather there is Program Memory and Data Memory. ... > Now are Program Memory and Data Memory 2 separate memory spaces? ...
    (comp.arch.embedded)
  • Re: 8051 architecture question
    ... >>>2) Bit Addressable Registers ... >>>Now are Program Memory and Data Memory 2 separate memory spaces? ... >> Spehro Pefhany ...
    (comp.arch.embedded)
  • Re: 8051 architecture question
    ... > From what I gather there is Program Memory and Data Memory. ... > 2) Bit Addressable Registers ... > Now are Program Memory and Data Memory 2 separate memory spaces? ...
    (comp.arch.embedded)