Re: 8051 architecture question
- From: Scott Moore <samiamsansspam@xxxxxxx>
- Date: Thu, 05 May 2005 15:24:30 -0700
JBrewster wrote:
> I've been through a couple of 8051 tutorials but still have a very
> fuzzy view of its architecture.
>
> Could someone draw me a simple view of it.
>
> From what I gather there is Program Memory and Data Memory.
>
> Withing Data Memory there are
>
> 1) General Purpose Registers (arranged in banks)
> 2) Bit Addressable Registers
> 3) Stack Space
> 4) SFR (Special Function Registers)
>
>
> Now are Program Memory and Data Memory 2 separate memory spaces? If
> not exactly where in Program memory does Data memory fit in? I read
> something about both these memories being dual mapped...
>
> Also where does the reserved memory area and scratchpad memory fit
> into the picture.
>
> Thanks.
>
The answer is "it can be". You can either split the data and address
spaces, or join them. The processor becomes slightly harder to program
in its split configuration, for example, it is more difficult to load
constants from the code space if, for example, you place the rom there
and need to access that.
Most of the places I used (ok, all of them) used the 8051 as a
unified address architecture.
.
- References:
- 8051 architecture question
- From: JBrewster
- 8051 architecture question
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