Re: 8051 architecture question

On Fri, 06 May 2005 15:38:15 -0700, the renowned Scott Moore
<samiamsansspam@xxxxxxx> wrote:

>Spehro Pefhany wrote:
>> On Wed, 04 May 2005 22:52:40 -0400, the renowned JBrewster
>> <john@xxxxxxxxxxxxx> wrote:
>>
>>
>>>I've been through a couple of 8051 tutorials but still have a very
>>>fuzzy view of its architecture.
>>>
>>>Could someone draw me a simple view of it.
>>>
>>
>>>>From what I gather there is Program Memory and Data Memory.
>>
>>>Withing Data Memory there are
>>>
>>>1) General Purpose Registers (arranged in banks)
>>>2) Bit Addressable Registers
>>>3) Stack Space
>>>4) SFR (Special Function Registers)
>>>
>>>
>>>Now are Program Memory and Data Memory 2 separate memory spaces? If
>>>not exactly where in Program memory does Data memory fit in? I read
>>>something about both these memories being dual mapped...
>>>
>>>Also where does the reserved memory area and scratchpad memory fit
>>>into the picture.
>>>
>>>Thanks.
>>
>>
>> Get Intel's original MSC-51 family user manual. That's got the most
>> complete description I've seen. Most of the subsequent manufacturers
>> omit and/or gloss over most of the basic info and show you the
>> differences and additions.
>>
>> Google for it, and if you can't find it, come back and I'll snicker at
>> you.
>>
>>
>> Best regards,
>> Spehro Pefhany
>
>Yes, I have an old, dog eared Intel book of the 8051. I went to the Intel
>site, and lo, and behold, their users manual for the 8051 is that exact
>same manual as I got 15 years ago. It even looks like a scan.

Yup. It's got hyperlinks, but they are on top of the scan. Mine is
dog-eared, but I don't dare touch it much these days as the paper they
used was pretty crummy. The MCS-48 section is somewhat depleted.

.

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