Re: GNUH8 mixed C and assembly

Peter Harrison wrote: 
David Brown wrote:

Peter Harrison wrote:


It seems that HEW allows you to set different levels of optimisation for individual source files so that is another way to go I suppose.

pete Harrison


No, that's not the way to go. Except in the case of compiler bugs (a rarity, unless your code is absurdly complicated and provokes obscure bugs), then code that fails when optimised is incorrect code. A program that only works when different parts are compiled with different optimisation flags is a maintainance nightmare.


Yes - good point. I had not really thought that through.

For extremely critical timing, then assembly is the only way to do it, assuming you can't (sensibly) make use of hardware timers. For non-critical pauses like you need here, loops with volatile counters are normally the correct way to go. Alternatives such as a loop body consisting of "asm volatile ("nop")" (or whatever fits for your target) are another method. 


Ah - I like that a bit.

Using a volatile variable forces the compiler to include the loop and seems also to make the loop timing invariant with optimisation level.


It won't necessarily make the loop timing invariant, but it is likely to, especially for a simple loop, such as a while() loop, counting down. Sometimes a slightly more complex loop (such as a for loop) will be optimised to different code.

Actually, I have been trying several simple loops and I have not yet been able to persuade GCC to eliminate an empty loop by changing optimisation levels. The code generated changes but is always there. Still, I will be happier when I can know what will be generated. At present I just set the optimisation to -O -Os. As you say, it is no good if a change in optimisation level stops things working.


You'll probably find that small loops will disappear, but not large ones. When the compiler sees a 10 round loop, it might consider unrolling it and then find it does nothing, so it is eliminated. A 1000 round loop will not be unrolled, and will not get the same optimisation. But you can't be sure of this, nor can you be sure of changes in the future as the compiler gets smarter.

Paul's link to the GCC ABI says that there are known clobbered registers for this compiler so it will not be too hard to implement and assembly-based delay that only uses the registers.


That's certainly possible, but unlikely to be necessary in this case (since your timing is not strict).

Peter Harrison


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