Re: TL16C550CIFN


CBFalconer 写道：

> "wuyi316904@xxxxxxxxx" wrote:
> >
> > Thanks a lot,I have a problem that I have set a simulation model to
> > verify this UART's DMA function,but the /RXRDY goes true when there is
> > only one character in the rxbuffer(I set the trigger level is 14),I
> > want to know why and can u give me a example of DMA mode configuration.
>
> Please include proper context. See my sig below, and especially
> the URL reference therein before posting again. Even the broken
> google interface CAN be used intelligently.
>
> IIRC most cacheing UARTs will allow you to adjust the trigger point
> (items in the cache) at which an interrupt will be raised. The
> RXRDY signal has a different purpose, it simply signals that that
> cache is non-empty. Thus once an interrupt occurs the service can
> be of the general form:
>
> while (rxrdy) buffer[index++] = rxdata;
> /* now reset and rearm interrupt system */
>
> Thus avoiding the overhead of a system interrupt for each byte.
>
> --
> "If you want to post a followup via groups.google.com, don't use
> the broken "Reply" link at the bottom of the article. Click on
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> More details at: <http://cfaj.freeshell.org/google/>

I don't know ur meanings very much.My problem is that the /RXRDY does't
operate correctly,it gose true(low) when the first byte has received by
the rxbuffer,not when the rxbuffer reach the trigger.

.

Relevant Pages

  • Re: TL16C550CIFN
    ... verify this UART's DMA function,but the /RXRDY goes true when there is ... IIRC most cacheing UARTs will allow you to adjust the trigger point ... Thus once an interrupt occurs the service can ... or more characters in the FIFO and more than three character ...
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  • Re: TL16C550CIFN
    ... verify this UART's DMA function,but the /RXRDY goes true when there is ... IIRC most cacheing UARTs will allow you to adjust the trigger point ... Thus once an interrupt occurs the service can ... or more characters in the FIFO and more than three character ...
    (comp.arch.embedded)
  • Re: TL16C550CIFN
    ... verify this UART's DMA function,but the /RXRDY goes true when there is ... IIRC most cacheing UARTs will allow you to adjust the trigger point ... Thus once an interrupt occurs the service can ... or more characters in the FIFO and more than three character ...
    (comp.arch.embedded)
  • Re: TL16C550CIFN
    ... want to know why and can u give me a example of DMA mode configuration. ... IIRC most cacheing UARTs will allow you to adjust the trigger point ... Thus once an interrupt occurs the service can ... not when the rxbuffer reach the trigger. ...
    (comp.arch.embedded)
  • Re: TL16C550CIFN
    ... > only one character in the rxbuffer(I set the trigger level is 14),I ... > want to know why and can u give me a example of DMA mode configuration. ... cache is non-empty. ... Thus once an interrupt occurs the service can ...
    (comp.arch.embedded)