Re: AVR Silly Interrupt problem
- From: "Peter Harrison" <peteh@xxxxxxxxxxxxx>
- Date: Fri, 3 Feb 2006 13:31:04 -0000
"Meindert Sprang" <ms@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:11u6ddu9f5rje66@xxxxxxxxxxxxxxxxxxxxx
"ja.......@.mail.com" <jasimpson@xxxxxxxxx> wrote in message
news:1138958981.507424.247110@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
Oh crap, I wish you were right!
But that was a mistake in my commenting!
TIMSK = TIMSK | 0x02 corresponds to setting OCIE0, which enables the
Output Compare Match Interrupt
which I believe is what I'm trying to catch with ISR(TIMER0_COMP_vect).
I have checked with AVR-LIBC over and over to make sure that that is
the right name for Output compare on an AtMega32.
Ok, the code seems to be OK then. I noticed you have a prescaler value of
1024. With a compare value of 0xA0, that is 163,840 clockcycles. Are you
waiting long enough? You might want to speed up the simulation by choosing
a
lower prescaler value, like no prescaling at all.
Meindert
Since the vectors for different AVRs are in different locations (as far as I
remember), are you compiling for the same processor as you are simulating
with.
I spent ages doing exactly that some time ago. Everything compiles but when
the interrupt occurs, the wrong vector was fetched for the interrupt
routine.
If you induce an interrupt and single step through the call, where do you
end up?
Pete Harrison
.
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