Re: TL16C550CIFN


CBFalconer wrote:
"wuyi316904@xxxxxxxxx" wrote:
CBFalconer 写道：
"wuyi316904@xxxxxxxxx" wrote:

Thanks a lot,I have a problem that I have set a simulation model to
verify this UART's DMA function,but the /RXRDY goes true when there is
only one character in the rxbuffer(I set the trigger level is 14),I
want to know why and can u give me a example of DMA mode configuration.

... snip about context. You caught on ...

IIRC most cacheing UARTs will allow you to adjust the trigger point
(items in the cache) at which an interrupt will be raised. The
RXRDY signal has a different purpose, it simply signals that that
cache is non-empty. Thus once an interrupt occurs the service can
be of the general form:

while (rxrdy) buffer[index++] = rxdata;
/* now reset and rearm interrupt system */

Thus avoiding the overhead of a system interrupt for each byte.

I don't know ur meanings very much. My problem is that the /RXRDY
does't operate correctly, it gose true(low) when the first byte has
received by the rxbuffer, not when the rxbuffer reach the trigger.

And I pointed out that it is correct. The trigger controls the
point at which an interrupt is raised. This has nothing to do with
DMA. It has everything to do with interrupt service. Data rates
from UARTs will normally be much too slow to bother with DMA
operation.

Maybe you should be describing what you are trying to do.

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Now,when the /RXRDY goes true,the interrupt signal goes true is
right?if not,when does the interrupt signal go true and what is the
value of iir this time?

.

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