Re: What application requires 500MHz for embedded processors

ARM expertise is not often free: someone should take
him up on that offer!

So is DSP and PPC (and much more, for that matter) expertise
some of which I already gave for free in this thread.
Enjoy.

Dimiter

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Dimiter Popoff Transgalactic Instruments

http://www.tgi-sci.com
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Stephen Clarke wrote:
"Didi" <dp@xxxxxxxxxxx> wrote in message
news:1142297032.012651.187070@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
The usual way to handle this on a general purpose
processor is to unroll and pack the loads.

Can you explain why this is not applicable in your
case?

Are you sure you read my postings. General purpose processors
are applicable, just at a different pesrformance cost.

I did not intend to ask, "why are general purpose processors
not applicable". Rather, I was trying to understand your
assertion that you need to do a 16-bit load from three
independent addresses every cycle.

The non-DSP orthodoxy is that this is not necessary, because
you can unroll the loop by 4, merge the loads, and load up to
twelve 16-bit objects from three independent addresses in three
cycles. i.e. even though you can only do one 64-bit load per cycle,
over three cycles, the effect is equivalent.

If you would explain (perhaps by an example) how you
want to unroll and pack the trivial filtering example I had given,
I might be able to explain more.

I cannot see that you have provided any example code.
However, Wilco has already offered to provide an
explanation if you do supply some code:

Wilco Dijkstra wrote:
Maybe you could show a C snippet of what you do, then I'll show you
an equivalent one that doesn't need 3 memory accesses per cycle.

ARM expertise is not often free: someone should take
him up on that offer!

Steve.

.

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