Re: Wich 16-bit MCU?
Robert Latest <boblatest@xxxxxxxxx> writes:
Another question, maybe really stupid: Skimming over some of these
datasheets I've noticed the absence of any externally available,
"classical" address and data bus. Everything seems to be
general-purpose I/O. Does that mean that I have to implement my own
protocol for addressing external devices on a bus, or can the I/O
pins be somehow switched into "von Neumann" mode?
As an example, the m32c chip is split into two halves with separate
Vcc for each half. One half can be GPIO or a classical CPU bus, the
other half is GPIO or peripheral I/O (A/D, serial, I2C, etc)
So you can have a 3.3v CPU side with ethernet and SRAM (or SDRAM on
the m32c/83), and a 5V side for peripherals and serial ports. Or you
can have a bazillion 5V GPIO ports. It pretty much allows you
pin-by-pin configuration of what that pin does, with some pins
handling up to ten different functions.
.
Relevant Pages
- Re: [RFC 2.6.27 1/1] gpiolib: add support for batch set of pins
... Linux systems that don't need to manipulate individual GPIO pins... ... I have come across the following scenarios where a bus set of gpio is useful: ... Actually I would expect that to be addressed by the hardware designer. ... non-consecutive pins to be used for a bus. ...
(Linux-Kernel) - 2.6.5-mm5-1 ACCRAID dies under heavy io load
... Resetting bus. ... rejecting I/O to offline device ... Apr 13 13:54:20 244.69-93-26.reverse.theplanet.com kernel: lost page write ... on device sda6, logical block 4048 ...
(Linux-Kernel) - Late Trip Report - 11 of 14 (So I cant count)
... Didn't have to wait very long foa a bus to get to All Star Sports. ... Alas, earwax they have no All Star Sports specific resort pins, but had a nice conversation with CM Dale, who's Earning His Ears. ... I didn't catch the name of the CM who was going to take me to my table but after a moment Ricardo came over to get me. ... He and his wife went to Shangai China for 7 days last year and will be going to Liverpool later this year for a Beatles Festival. ...
(rec.arts.disney.parks) - 6.1 hardware issues
... that's the same bus that the 896 is on.. ... pci0: <PCI bus> on pcib0 ... xl0: using port I/O ... BASE0 0xe0000008 addr 0xe0000000 MEM PREFETCHABLE ...
(comp.unix.bsd.freebsd.misc) - Re: Getting the best out of new server hardware: a disk setup for Oracle database
... than a failed attempt to distribute IO load evenly over the disks by manually relocating the datafiles ... With proper quantity of NVRAM on your disk array, you will start seeing bottleneck of the architecture around 1200 I/O requests per second. ... PC architecture lacks things like I2O, bus arbitration, separate cache coherency lines and data lines, proper write-back CPU caches and alike. ... When you stuff that box with 1200 I/O requests per second, network, virtual memory management and video card management, that bus will behave as any major highway with more traffic then it can handle. ...
(comp.databases.oracle.server) |
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